一种改进的Sobel自适应边缘检测的FPGA实现

宁赛男; 朱明; 孙宏海; 徐芳

doi:10.3788/YJYXS20142903.0395

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一种改进的Sobel自适应边缘检测的FPGA实现

器件驱动与控制 | 更新时间：2020-08-12

- 一种改进的Sobel自适应边缘检测的FPGA实现
- Realization of improved Sobel adaptive edge detection algorithm based on FPGA
- 液晶与显示 2014年29卷第3期页码：395-402
- 作者机构：
  
  1. 中国科学院长春光学精密机械与物理研究所, 吉林长春 130033
  2. 中国科学院大学, 北京 100049
  3. 中国科学院航空光学成像与测量重点实验室, 吉林长春 130033
- 作者简介：
- 基金信息：
  
  吉林省重大科技攻关项目（No.11ZDGG001）()
- DOI：10.3788/YJYXS20142903.0395
  中图分类号： TN911.73;TP752.1
- 收稿日期：2013-05-29，
  
  修回日期：2013-08-09，
  
  网络出版日期：2013-08-29，
  
  纸质出版日期：2014-04-25
- 稿件说明：
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宁赛男, 朱明, 孙宏海, 徐芳. 一种改进的Sobel自适应边缘检测的FPGA实现[J]. 液晶与显示, 2014,29(3): 395-402

NING Sai-nan, ZHU Ming, SUN Hong-hai, XU Fang. Realization of improved Sobel adaptive edge detection algorithm based on FPGA[J]. , 2014,29(3): 395-402
宁赛男, 朱明, 孙宏海, 徐芳. 一种改进的Sobel自适应边缘检测的FPGA实现[J]. 液晶与显示, 2014,29(3): 395-402 DOI： 10.3788/YJYXS20142903.0395.

NING Sai-nan, ZHU Ming, SUN Hong-hai, XU Fang. Realization of improved Sobel adaptive edge detection algorithm based on FPGA[J]. , 2014,29(3): 395-402 DOI： 10.3788/YJYXS20142903.0395.

摘要

针对经典Sobel边缘检测算法对噪声比较敏感而且需要人为指定阈值等问题，提出了一种Sobel自适应边缘检测方法。首先，对经典Sobel算法改进，增加了检测方向，根据待测像素背景灰度值和人眼视觉特性自适应地生成阈值，从而检测出与人的主观视觉更为一致的图像边缘，然后对边缘图像进行形态学处理，增强了算法的抗噪性。将改进的边缘检测算法在单片FPGA上实现，利用FPGA高速并行处理的优势，系统能够实时采集、检测图像边缘并显示高帧频高分辨率图像。

Abstract

The paper proposes an improved Sobel adaptive edge detection algorithm for the sensitivity to noise and given threshold of the classical Sobel algorithm. First

the classical Sobel algorithm is improved and the direction of the detection is expanded. The adaptive threshold is automatically generated according to the background gray of the detecting pixel and the human visual property. Accordingly

the image edge that is more consistent with human subjective vision can be detected. The improved algorithm restrains effectively the noise by processing the edge image with mathematical morphologic method. The improved edge detection algorithm is embedded in a single FPGA and the system can collect image with high frame and resolution

detect edge and then display in real time taking advantage of high-speed parallel processing of FPGA.

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Keywords

references

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