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TFT阵列基板过孔电阻与耐流性能研究
Research of
via hole resistance and current withstanding properties in TFT array substrate- 液晶与显示 2022年37卷第3期 页码：342-350
- 作者机构：
福州京东方光电科技有限公司，福建 福州 350300
- 作者简介：
[ "陈运金(1990-)，男，江西赣州人，硕士，工程师，2016年于福州大学获得硕士学位，主要从事TFT-LCD工艺技术研究工作。E-mail: chenyunjin@boe.com.cn" ]
- 基金信息：
DOI：10.37188/CJLCD.2021-0247
中图分类号： TN32; TN305收稿日期：2021-09-23，
修回日期：2021-12-04，
纸质出版日期：2022-03
- 稿件说明：
移动端阅览
陈运金, 欧忠星, 冯玉春, 等. TFT阵列基板过孔电阻与耐流性能研究[J]. 液晶与显示, 2022,37(3):342-350.
Yun-jin CHEN, Zhong-xing OU, Yu-chun FENG, et al. Research of
via hole resistance and current withstanding properties in TFT array substrate[J]. Chinese journal of liquid crystals and displays, 2022, 37(3): 342-350.陈运金, 欧忠星, 冯玉春, 等. TFT阵列基板过孔电阻与耐流性能研究[J]. 液晶与显示, 2022,37(3):342-350. DOI： 10.37188/CJLCD.2021-0247.
Yun-jin CHEN, Zhong-xing OU, Yu-chun FENG, et al. Research of
via hole resistance and current withstanding properties in TFT array substrate[J]. Chinese journal of liquid crystals and displays, 2022, 37(3): 342-350. DOI： 10.37188/CJLCD.2021-0247.
摘要
薄膜晶体管阵列基板过孔电阻大、耐流性差易发生过孔烧毁，引起显示异常。目前针对过孔电阻与耐流性影响因素及机理尚不明确，制约着未来高耐流性过孔的制备和应用。本文实验结果表明：氧化铟锡(Indium Tin Oxide，ITO)膜方块电阻减小、过孔坡度角减小、ITO膜与金属接触面积增大均可降低过孔电阻、提升过孔耐流性。结合过孔结构及机理分析指出，过孔电阻主要由ITO膜层自身电阻(
R
ITO
)及过孔接触电阻(
R
contact
)组成，ITO膜方块电阻及过孔坡度角减小会使
R
ITO
减小，ITO膜与金属接触面积增大会使
R
contact
减小。基板中部过孔耐流性差与中部的ITO膜方块电阻及过孔坡度角偏大有关。在满足产品光学品质标准前提下，ITO膜厚增厚、调控绝缘层膜质以及干法刻蚀参数减小坡度角、加大过孔接触面积设计是降低过孔电阻、提升过孔耐流性的有效途径。
Abstract
If TFT array substrate has large
via
hole resistance and poor current withstanding properties
via
hole is easy to burn up which will cause abnormal display. At present
the influencing factors and mechanism of the
via
hole resistance and current withstanding properties are not clear
which restricts the preparation and application of the
via
hole with good current withstanding properties. In this paper
the experimental results show that reducing block resistance of indium tin oxide film (ITO)
reducing the slope angle of
via
hole and increasing contact area between ITO film and metal can reduce
via
hole resistance and improve current withstanding properties of the
via
hole. Combined with the analysis of
via
hole structure and mechanism
it is pointed out that the
via
hole resistance is mainly composed of ITO film resistance (
R
ITO
) and the
via
hole contact resistance (
R
contact
). Either reducing block resistance of ITO film or the slope angle of
via
hole will reduce ITO film resistance (
R
ITO
)
while increasing contact area between ITO film and metal will reduce the
via
hole contact resistance (
R
contact
). The
via
hole current withstanding properties is worse in middle of the substrate because the ITO film block resistance and
via
hole slope angle are larger. Thicken ITO film
regulating insulating layer film quality and dry etching parameters to reduce slope angle and increase
via
hole contact area are effective ways the
via
hole resistance and improve the
via
hole current withstanding properties under the premise of meeting product optical quality standard.
关键词
Keywords
references
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