CHEN Li-wen, YE Yun, GUO Tai-liang etc. Optimization of via etching process of LTPS TFT interlayer dielectric[J]. , 2016,31(4): 363-369 DOI: 10.3788/YJYXS20163104.0363.
Optimization of via etching process of LTPS TFT interlayer dielectric
In order to adapt to the trend of ultra-high resolution and extremely fine wiring of LTPS TFT LCD display
reduce the yield loss generated by via etching process of LTPS TFT interlayer dielectric
and improve the production quality
the process optimization of via etching process of LTPS TFT interlayer dielectric was investigated. The experiments were based on dry etching as the main etching step assisted with wet etching. It not only conbined with the excellent control of profile and feature size of dry etching but also got high etching selectivity of wet etching. The experiments also aimed at reducing the damage and defects reduced by dry etching and avoiding pollution of the hole surface by etching by-products. Experimental results indicated that dry etching assisted with wet etching basically solved the problems of over etching and etching residual
reduced the yield loss of via etching defect rate by 73%. And contact resistance reduced by about 90%
ON-state drain current raised 15% of the dry etching. Therefore dry etching assisted with wet etching is an innovative method to optimize the via etching process and promote product performance.
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references
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