Real-time FPGA-based implementation of color image edge detection algorithm

CHEN Hu; LING Chao-dong; ZHANG Hao; YANG Xiao; TANG Wei

doi:10.3788/YJYXS20153001.0143

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Real-time FPGA-based implementation of color image edge detection algorithm

Imaging Technology & Image Processing | 更新时间：2020-08-12

- Real-time FPGA-based implementation of color image edge detection algorithm
- Chinese Journal of Liquid Crystals and Displays Vol. 30, Issue 1, Pages: 143-150(2015)
- 作者机构：
  
  1. 华侨大学信息科学与工程学院,福建厦门,361021
  2. 厦门市专用集成电路系统重点实验室,福建厦门,361008
- 作者简介：
- 基金信息：
- DOI：10.3788/YJYXS20153001.0143
  CLC： TN911.73
- Received：24 March 2014，
  
  Revised：23 April 2014，
  
  Published：05 February 2015
- 稿件说明：
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陈虎, 凌朝东, 张浩, 杨骁, 汤炜. 基于FPGA的实时彩色图像边缘检测算法的实现[J]. 液晶与显示, 2015,30(1): 143-150

CHEN Hu, LING Chao-dong, ZHANG Hao, YANG Xiao, TANG Wei. Real-time FPGA-based implementation of color image edge detection algorithm[J]. , 2015,30(1): 143-150
陈虎, 凌朝东, 张浩, 杨骁, 汤炜. 基于FPGA的实时彩色图像边缘检测算法的实现[J]. 液晶与显示, 2015,30(1): 143-150 DOI： 10.3788/YJYXS20153001.0143.

CHEN Hu, LING Chao-dong, ZHANG Hao, YANG Xiao, TANG Wei. Real-time FPGA-based implementation of color image edge detection algorithm[J]. , 2015,30(1): 143-150 DOI： 10.3788/YJYXS20153001.0143.

摘要

针对传统的基于灰度图像的边缘检测算法抗噪能力弱、对方向敏感、获取边缘细节信息较粗等不足

本文通过分析彩色图像的特点

提出一种改进的Sobel算子与快速中值滤波相结合的彩色图像边缘检测算法

通过扩展边缘检测算子的方向模板

提高Sobel算子对纹理复杂图像的适应能力及抵抗噪声的能力.该改进算法在Altera DE2-70 FPGA硬件开发平台上

应用Verilog HDL语言与Quartus II中的可编程宏功能模块实现.实验结果表明

该算法的处理只占用了约2%的系统硬件资源

资源占用相对合理

且图像边缘定位准确

抗噪能力强

能够实时有效地提取出彩色图像的边缘.

Abstract

Traditional grayscale-based image edge detection algorithms generally suffer from the disadvantages in weak anti-noise ability

sensitivity to direction and coarse edge details. Based on the analysis of statistics and characteristics of color images

this paper presents a modified algorithm for color image edge detection that combines the Sobel operator and a fast median filtering. By expanding the direction templates of the edge detection operator

the modified algorithm can improve the abilities to adapt the complex texture images and resist strong noises. The modified algorithm is implemented on the Altera DE2-70 FPGA hardware development platform by programming with the Verilog HDL language and the Megafunctions of Quartus II. The experimental results show that the processing of the modified algorithm reasonably takes up only about 2% of system hardware resources to accurately locate the image edges and efficiently extract the edges of color images in real time under strong noises.

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references

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