Camera link to HD-SDI interface converting system using FPGA

CHEN Dong-cheng; ZHU Ming; HAO Zhi-cheng; LIU Jian

doi:10.3788/YJYXS20142906.1065

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Camera link to HD-SDI interface converting system using FPGA

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- Camera link to HD-SDI interface converting system using FPGA
- Chinese Journal of Liquid Crystals and Displays Vol. 29, Issue 6, Pages: 1065-1070(2014)
- 作者机构：
  
  1. 中国科学院长春光学精密机械与物理研究所, 吉林长春 130033
  2. 中国科学院大学, 北京 100049
- 作者简介：
- 基金信息：
- DOI：10.3788/YJYXS20142906.1065
  CLC： TN941.1
- Received：11 April 2014，
  
  Revised：20 May 2014，
  
  Published：05 December 2014
- 稿件说明：
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陈东成, 朱明, 郝志成, 刘剑. 基于FPGA的CameraLink转HD-SDI接口转换系统[J]. 液晶与显示, 2014,29(6): 1065-1070

CHEN Dong-cheng, ZHU Ming, HAO Zhi-cheng, LIU Jian. Camera link to HD-SDI interface converting system using FPGA[J]. , 2014,29(6): 1065-1070
陈东成, 朱明, 郝志成, 刘剑. 基于FPGA的CameraLink转HD-SDI接口转换系统[J]. 液晶与显示, 2014,29(6): 1065-1070 DOI： 10.3788/YJYXS20142906.1065.

CHEN Dong-cheng, ZHU Ming, HAO Zhi-cheng, LIU Jian. Camera link to HD-SDI interface converting system using FPGA[J]. , 2014,29(6): 1065-1070 DOI： 10.3788/YJYXS20142906.1065.

摘要

由于Camera Link相机具有接口复杂、传输距离近等局限性，设计并实现了一种基于FPGA的Camera Link转HD-SDI接口转换系统。该系统采用Altera公司的EP2S60F1020高性能FPGA完成图像数据的采集并按SMPTE 274M标准编码；为解决Camera Link相机输出数据同HD-SDI输出图像行、场时间不同的问题，采用3片SDRAM作为帧缓存模块，延迟1帧输出；编码完成的数据输出到并串转换芯片LMH0030，从而得到HD-SDI格式的视频输出。由于Camera Link相机输出数据同HD-SDI输出图像的帧频并不绝对相同，每隔708帧必须丢去一帧数据，从而导致输出时固定丢帧，但FPGA对图像的处理并不会丢帧。实验结果表明，本系统能够将Camera Link相机输出的图像数据转换成HD-SDI输出，并用采集卡采集到图像数据。

Abstract

Aiming at the shortcoming that Camera Link has complex interface and can only transfer in short distance

an interface converting system converting Camer Link to HD-SDI is designed. A high performance FPGA EP2S60F1020 of Altera Company is used to acquire the image data and code the data based on SMPTE 274M standard. To solve the problem that the horizontal and vertical time are different between Camera Link and HD-SDI

3 pieces of SDRAM are used as frame buffer. And the output frame of HD-SDI is delayed for a frame. The coded data is output to a serializer LMH0030

and the HD-SDI data is the output. As the vertical time of Camera Link and HD-SDI is not accurate the same

a frame must be dropped after every 708 frames. But the images being processed by the FPGA are not dropped. The result shows that the system can convert images coming from Camera Link to HD-SDI. And the data output can be acquired by a SDI acquiring card.

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references

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