NING Yong-hui, GUO Yong-fei, MA Tian-bo, XUE Xu-cheng. Architecture Design of 5/3 Lifting Wavelet in FPGA with Dynamic RAMs and its Applications[J]. , 2013,28(6): 927-932
NING Yong-hui, GUO Yong-fei, MA Tian-bo, XUE Xu-cheng. Architecture Design of 5/3 Lifting Wavelet in FPGA with Dynamic RAMs and its Applications[J]. , 2013,28(6): 927-932 DOI: 10.3788/YJYXS20132806.0927.
Architecture Design of 5/3 Lifting Wavelet in FPGA with Dynamic RAMs and its Applications
In order to improve the transmission performances of the high speed image transmission data in TDICCD imaging system
it designed the new structure with dynamic RAMs for designing 5/3 lifting wavelets in FPGA. It solved the problem that the RAMs in FPGA were not adequate in some applications by using the same RAM in loops and reading-or-writing
which improved the ability of the RAM used efficiency. The simulation results also indicated that the new structure was better at the aspects of high speed
high reliability
low resource used ratio. The structure could be used in image pre-compress
image de-noise
image transmission and other areas. The new structure of the 5/3 lifting wavelets implementation in FPGA
within 5 lines image storage finishing the processing
enhanced the processing ability of the image data in aero-space camera. It created a new way of data real-time process in space.
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