A new structure for thin-film transistors is proposed and demonstrated
exhibiting the benefits but not the drawbacks of both short-channel and multi-junction effects. Simulations are performed to verify the physics of this device structure. All characteristics such as threshold voltage
pseudo subthreshold slope
on-off current ratio and field-effect mobility are improved. Furthermore
device hot carrier and self-heating reliability are also improved by this new structure.
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Keywords
references
Meng Z, Chen H, Qiu C, et al. Application of metal-induced unilaterally crystallized polycrystalline silicon thin-film transistor technology to active-matrix organic light-emitting diode displays[C]//International Electron Devices Meeting, 2000. IEDM00. Technical Digest,2000:611-614.[2] Nomura K, Ohta H, Takagi A, et al. Room-temperature fabrication of transparent flexible thin-film transistors using amorphous oxide semiconductors [J]. Nature,2004,432:488-492.[3] Masuda S, Kitamura K, Okumura Y, et al. Transparent thin film transistors using ZnO as an active channel layer and their electrical properties [J]. J. Appl. Phys., 2003, 93(3):1624-1630.[4] Morita Y, Noguchi M. UV pulsed laser annealing of Si+ implanted silicon film and low-temperature super-thin film transistors [J]. Japanese Journal of Applied Physics Part 2-Letters,1989, 28:L309-L311.[5] Hatalis M, Greve D. High-performance thin-film transistors in low-temperature crystallized Lpcvd amorphous-silicon films [J]. IEEE Electron Device Letters, 1987,8(8):361-364.[6] Zhao S Y, Meng Z G, Wu C Y, et al. Solution-based metal induced crystallized polycrystalline silicon films and thin-film transistors [J]. Journal of Materials Science-Materials in Electronics, 2007,18(1):117-121.[7] Im J, Crowder M, Sposili R, et al. Controlled super-lateral growth of Si films for microstructural manipulation and optimization [J]. Physica Status Solidi A-Applied Research, 1998, 166(2):603-617.[8] Lee S, Joo S. Low temperature poly-Si thin-film transistor fabrication by metal-induced lateral crystallization [J]. IEEE Electron Device Lett.,1996, 17(4):160-162.[9] Meng Z, Wang M, Wong M. High performance low temperature metal-induced unilaterally crystallized polycrystalline silicon thin film transistors for system-on-panel applications [J]. IEEE Transactions on Electron Devices, 2000,47(2):404-409.[10] Sohn W, Choi J, Kim K, et al.Crystalline orientation of polycrystalline silicon with disklike grains produced by silicide-mediated crystallization of amorphous silicon [J]. J. Appl. Phys., 2003,94(7):4326-4331.[11] Yabuta H, Sano M, Abe K, et al. High-mobility thin-film transistor with amorphous InGaZnO4 channel fabricated by room temperature rf-magnetron sputtering [J]. Appl. Phys. Lett., 2006,89(11):112123(1-3).[12] Hoffman R, Norris B, Wager J. ZnO-based transparent thin-film transistors [J]. Appl. Phys. Lett., 2003, 82(5):733-735.[13] Proano R, Misage R, AST D. Development and electrical-properties of undoped polycrystalline silicon thin-film transistors [J]. IEEE Transactions on Electron Devices, 1989,36(9):1915-1922.[14] Jeon J, Lee M, Park K, et al. A new polycrystalline silicon TFT with a single grain boundary in the channel [J]. IEEE Electron Device Lett., 2001,22(9):429-431.[15] Gaucci P, Valletta A, Mariucci L, et al. Role of field enhanced mechanisms and impact ionization on the threshold voltage of short channel polycrystalline silicon thin film transistors [J]. Appl. Phys. Lett., 2008, 93(19):193512.[16] Brotherton S, Glasse C, Glaister C, et al. High-speed, short-channel polycrystalline silicon thin-film transistors [J]. Appl. Phys. Lett.,2004, 84(2):293-295.[17] Valletta A, Gaucci P, Mariucci L, et al. Modelling velocity saturation and kink effects in p-channel polysilicon thin-film transistors [J]. Thin Solid Films,2007, 515(19):7417-7421.[18] LIU, LEE K. An experimental-study on the short-channel effects in undergated polysilicon thin-film transistors with and without lightly doped drain structures [J]. IEEE Electron Device Letters, 1993,14(3):149-151.[19] Noguchi T. Appearance of single-crystalline properties in fine-patterned Si thin-film transistors (TFTs) by solid-phase crystallization (SPC) [J]. Japan. J. Appl. Phys. Part 2-Letters, 1993, 32:L1584-L1587.[20] Chen T, Yeh C, Lou J. Effects of grain boundaries on performance and hot-carrier reliability of excimer-laser annealed polycrystalline silicon thin film transistors [J]. J. Appl. Phys., 2004, 95(10):5788-5794.
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Related Author
Zhi-he XIA
Wei ZHOU
Rong-sheng CHEN
Man WONG
Hoi-Sing KWOK
Meng ZHANG
KWOK Hoi-sing
WONG Man
Related Institution
State Key Laboratory on Advanced Displays and Optoelectronics Technologies, The Hong Kong University of Science and Technology
State Key Laboratory on Advanced Displays and Optoelectronics Technologies, Hong Kong University of Science and Technology
North LC Engineering Research and Development Center, Changchun Institute of Optics, Fine Mechanics and Physics, Chinese Academy of Sciences, Changchun 130031, China, E-mail: wangzj