Processing and Hardware Implementation of BT.656 Digital Video Stream

LIU Yun-chuan; GONG Xiang-dong

doi:10.3788/YJYXS20132802.0238

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Processing and Hardware Implementation of BT.656 Digital Video Stream

Driving & Controlling | 更新时间：2020-08-12

- Processing and Hardware Implementation of BT.656 Digital Video Stream
- Chinese Journal of Liquid Crystals and Displays Vol. 28, Issue 2, Pages: 238-243(2013)
- 作者机构：
  
  深圳大学电子科学与技术学院, 深圳市微纳光子信息技术重点实验室深圳,518060
- 作者简介：
- 基金信息：
- DOI：10.3788/YJYXS20132802.0238
  CLC： O753+.2
- Received：05 September 2012，
  
  Revised：28 September 2012，
  
  Published：15 April 2013
- 稿件说明：
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刘云川, 龚向东. BT.656数字视频流的处理及其硬件实现[J]. 液晶与显示, 2013,28(2): 238-243

LIU Yun-chuan, GONG Xiang-dong. Processing and Hardware Implementation of BT.656 Digital Video Stream[J]. , 2013,28(2): 238-243
刘云川, 龚向东. BT.656数字视频流的处理及其硬件实现[J]. 液晶与显示, 2013,28(2): 238-243 DOI： 10.3788/YJYXS20132802.0238.

LIU Yun-chuan, GONG Xiang-dong. Processing and Hardware Implementation of BT.656 Digital Video Stream[J]. , 2013,28(2): 238-243 DOI： 10.3788/YJYXS20132802.0238.

摘要

BT.656格式数字视频流是一种广泛应用的视频流。然而

显示设备(如LCD液晶显示器、大面阵LED显示屏以及部分微投影器件)仅能直接显示RGB色彩空间的视频信号。BT.656视频流转为RGB视频流要进行解交织、隔行到逐行、色空间转换等处理。文章介绍了BT.656数字视频格式协议

着重阐述了在现场可编程门阵列平台上处理成24位RGB色空间逐行视频的实现方式。利用Verilog-HDL语言进行电路描述

在单片多端口SDRAM时序控制器进行视频数据的储存

并完成后续处理

视频系统在自主研制的微投影系统上进行了验证

实现了24位真彩色852480、30帧每秒实时处理和传输。文章实现的方案稳定可靠、便于移植、开发周期短

硬件开销小

色空间转换中避免了繁琐的浮点运算

仅占用1 783个逻辑单元。

Abstract

BT.656 is a wildly used digital video Stream. However

display devices

such as LCD monitor

LED display area array

as well as part of the micro-projection devices

can only be displayed directly to the video signal of the RGB color space. The conversion from BT.656 to RGB Video Stream consists processing of de-interleave

interlaced to progressive

color space conversion. BT.656 protocol was introduced

and platform based on field programmable gate array implementation of the progressive video of the 24-bit RGB color space was expounded. System on Chip which video information was stored by utilizing multi-port SDRAM timing controller

and then in turn to complete the follow-up processing was designed by Verilog Hardware Hardware Description Language. The system was verified on an independent developed Micro-Projection system

24-bit true color of resolution up to 852480 at 30 frames per second in real-time processing and transmission was achieved. Then

the system is flexible

reliable

of short development cycle and cost-saving in hardware (merely accounted for 1 783 logic elements)

which avoids cumbersome floating-point operations in color space conversion.

关键词

Keywords

references

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