Aimed at the necessary of digital video convert from RGB to BT.656 on many occasion
a realization scheme based on FPGA was put forward. The key technology and modules of system was analyzed. The status transfer mechanism was used to accomplish the production of BT.656 video timing; The linear and circular compensation method was applied to avoid the color distortion when conversion from RGB to YUV; The FIFO circuit with function of input and output selection control was employed to resolve the speed matching between input data and output data. The emulation result shows good purpose while an application example is introduced to indicate its broad prospect in video signal conversion.
Improvement in encoding method of solid volumetric true 3D display
Design of dual-port video buffer based on FPGA
Application of EDMA in Rapid Transmission of Image Data
Related Author
HU Yao-hui
DING Xiao-yu
DAI Piao
REN Yi-ni
MA Xing-yu
LV Guo-qiang
TANG Bin
DAN Yong-ping
Related Institution
Key Lab of Special Display Technology, Ministry of Education, National Engineering Lab of Special Display Technology, National Key Lab of Advanced Display Technology, Academy of Opto-Electronic Technology, Hefei University of Technology
Department of Computer and Information, Hefei University of Technology
School of Information, Guizhou University of Finance and Economics, Guiyang 550025, China
School of Electric and Information Engineering, Zhongyuan University of Technology