HAN Hong-xia, WANG Di-nan, SUN Hang. Adjustment Design for Especial Sequence of Camera Video Based on FPGA[J]. , 2011,26(4): 523-526 DOI: 10.3788/YJYXS20112604.0523.
Adjustment Design for Especial Sequence of Camera Video Based on FPGA
To meet the requirement of the especial sequence IR camera signal being captured by the general CameraLink imaging acquisition card
the sequence adjustment and interface transforming system based on FPGA was designed. The SignaTap tool was applied to measure the detailed sequence of the IR camera output and based on which the sequence adjustment system was designed according to the sequence requirement of the imaging acquisition card. The FIFO module in FPGA was applied to realize the pixel clock modification and the data saving and taking. The Verilog programming was applied to realize the pick-up of the valid signal
the cut-off of the invalid signal and the modification of the line valid and frame valid signal. The camera especial sequence adjustment system adjusted the especial sequence to the sequence that can be identified by the common CameraLink imaging acquisition card.The experiment shows that the processed image signal can be captured by the imaging acquisition card and the displayed image is correct and stable.
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李娜,丁亚林,冷雪,等.线阵CCD相机模拟器的分析与设计[J]. 液晶与显示, 2009,24(6): 922-926.[2] 贾建禄,王建立,郭爽,等.基于CameraLink的高速图像采集处理器[J]. 液晶与显示, 2010,25(6): 915-918.[3] 董杰,董建婷.空间面阵CCD相机时序电路设计[J]. 航天返回与遥感, 2008,29(2):53-60.[4] 佟首峰,阮锦,刘金国,等.智能型高速CCD相机时序电路的研制[J]. 光学技术, 2000,26(6):552-555.[5] 夏宇闻. Verilog数字系统设计教程 [M].第2版.北京:北京航空航天大学出版社,2009:26-128.[6] 李宁,汪骏发. 基于Camera Link的高速数据采集系统[J]. 红外, 2005,(7):31-37.[7] Lin Junting. Optical-Electronic Technology and Application[M].Beijing: National Defence Industry Press,1983.[8] Levine P A, Saucer D J, Shallcross F V. High frame rate multi-port CCD imager and camera [J]. SPIE,1992,1952:257-267.