WANG Wen-hua, HE Bin, REN Jian-yue. Transmission Bandwidth of 3-Wire Synchronous Serial Port Based on LVDS[J]. , 2011,26(3): 344-349 DOI: 10.3788/YJYXS20112603.0344.
Transmission Bandwidth of 3-Wire Synchronous Serial Port Based on LVDS
This paper tries to exam the transmission bandwidth by establishing a scientific test-platform. The paper provides a test pattern formed by 10 bit raw image data which is generated by FPGA as transmitter. The receiver performs data conversion serial-to-parallel and then sends image data as well as clock and enable signals to the image grabber. The transmission reliability is estimated by checking the real-time received test pattern through the 3-wire LVDS serial port. From abundant experiments
the paper gets two results: when LVDS is implemented by imbedding modules in FPGA
transmission bandwidth is approx 152 Mbit/s; when LVDS is implemented by special LVDS devices
transmission bandwidth is approx 125.2 Mbit/s. In practical application cases