YIN Dong-hui, REN Yan-nan, YUE Chao, LI Fu-le, CHI Bao-yong, CHEN Zhi-liang. Design of LCD Driver Chip with 1024-Level Gray Scale and Large Capacitor Load[J]. , 2011,26(1): 78-82
YIN Dong-hui, REN Yan-nan, YUE Chao, LI Fu-le, CHI Bao-yong, CHEN Zhi-liang. Design of LCD Driver Chip with 1024-Level Gray Scale and Large Capacitor Load[J]. , 2011,26(1): 78-82 DOI: 10.3788/YJYXS20112601.0078.
Design of LCD Driver Chip with 1024-Level Gray Scale and Large Capacitor Load
A single driver chip based on dynamic scanning is developed for Liquid Crystal Display (LCD). The chip is a high voltage CMOS IC with mixed signals and offers optional output frequencies. The input data frequency of the chip is 13.5 MHz
and the 256 columns output voltage signals directly drive the LCD. The output signal range of every column is over 12 V
which is divided into 1 024 levels. The max-range rising/falling time of the output signal can be less than 5 s when load capacitor is 200 pF. The chip has been realized in Chartered 0.35 m 18 V high voltage process and the layout is designed carefully to minimize the mismatch error. Post layout simulation results illustrate that the design can well accord with the specification.
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Hong S I, Han J W, Kim D H, et al. A double-loop control LED backlight driver IC for medium-sized LCDs [J]. ISSCC Dig. Tech. Papers, 21, 6(2): 116-118.[2] Woo J K, Jeong D K, Kim S H. High-speed 1-bit LCD column driver with a split DAC and a class-AB output buffer [J]. IEEE Transactions on Consumer Electronics, 29, 55(3):1431-1437.[3] Yamaguchi K, Hori Y, Lee S W, et al. A 1b column driver with variable-current-control interpolation for mobile active-matrix LCDs [J]. ISSCC Dig. Tech. Papers, 29, 15(2):138-139.[4] 林志成, 邵庆益, 陈阿青. 用于TFT-LCD驱动电路的输出缓冲放大器 [J]. 液晶与显示, 24, 24(3):49-412.[5] Langen K, Huijsing J H. Compact low-voltage power-efficient operational amplifier cells for VLSI [J]. IEEE J. Solid-State Circuits, 1998, 33:1482-1496.[6] 应根裕, 胡文波,邱勇,等. 平板显示技术 [M]. 北京:人民邮电出版社, 22: 187-212.[7] Razavi B. Design of analog CMOS integrated circuits [M]. Beijing: Tsinghua University Press, 23: 377-39.[8] Razavi B. Principles of data conversion system design [M]. New Yorks: IEEE Press, 1995: 7-94.[9] Doris K, van Roermund A , Leenaerts D. Wide-bandwidth High Dynamic Range D/A Converters [M]. Berlin: Springer, 26: 45-88.