Horizontal Line Mura is one kind of defect during TFT-LCD manufacturing process. This defect will affect display quality seriously. After analyzing the profile of the metal layer and measuring the stress status of metal film

the root cause can be revealed. It shows that during deposition process of metal film on glass substrate

the stress of Mo layer between the center area and glass edge is different

and this caused the loose of Mo layer

which affect the capacitor between gate and source electrode

then cause display voltage shifting on the pixel. To solve this issue

by removing bottom Mo layer to adjust Gate layer stack ratio

the failure rate can be effectively reduced. And this is demonstrated by experiment.