In order to meet the requirement of miniaturization and portability of the image storage system for camera based on Camera Link interface
the hardware circuit was designed with a Virtex4 family Field Programming Gate Array(FPGA) from Xilinx company and a 6000 series Digital Signal Processor(DSP) from TI company. First
under the control of FPGA
Image data from Camera Link were cached in a SDRAM; at the same time
the image data which read from the other SDRAM were stored in double solid-state hard disks by ping-pang operation. Then the host computer connected with DSP through Fast Ethernet
under the control of the host computer
DSP acquired image data through External Memory Interface (EMIF) and sent it to host computer to realize real-time display or image playback function. The system that based on the scheme stored image successfully
past by the experiment in 640×480
100f/s
10bit monochrome. When the real-time display function is not needed
the designed system could accomplish image storage independently to complete the storage task to meet the Base Camera Link type Camera portable storage requirements.
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references
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