A high driving capability CMOS buffer amplifier with high slew-rate
low power consumption is proposed. Low power and high driving capability are achieved by using a Class AB push-pull stage and two Class B auxiliary stages with positive feedback. The design buffer amplifier draws 7 A static current and the setting time to 1% precision is less than 6 s under a 0~20 nF capacitance load with a 0.15 m CMOS model
which satisfies the setting time requirement of LCD driving circuit; By using cascoded frequency compensation combined with zero formed with the capacitive loads
large dynamic range of capacitive loads is satisfied.
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references
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