Design of LCoS Low-Power Frame Buffer Pixel Circuit

SONG Yu-long

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Design of LCoS Low-Power Frame Buffer Pixel Circuit

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- Design of LCoS Low-Power Frame Buffer Pixel Circuit
- Chinese Journal of Liquid Crystals and Displays Vol. 25, Issue 3, Pages: 401-406(2010)
- 作者机构：
  
  中国科学院长春光学精密机械与物理研究所,吉林长春 130033,E-mail lgciomp@126.com
- 作者简介：
- 基金信息：
- DOI：
  CLC： TN27;TN710
- Received：15 January 2010，
  
  Revised：02 January 1900，
  
  Published Online：30 June 2010，
  
  Published：30 June 2010
- 稿件说明：
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宋玉龙. 一种新型LCoS低功耗帧存储像素电路设计[J]. 液晶与显示, 2010,25(3): 401-406

SONG Yu-long. Design of LCoS Low-Power Frame Buffer Pixel Circuit[J]. 液晶与显示, 2010,25(3): 401-406
宋玉龙. 一种新型LCoS低功耗帧存储像素电路设计[J]. 液晶与显示, 2010,25(3): 401-406 DOI：

SONG Yu-long. Design of LCoS Low-Power Frame Buffer Pixel Circuit[J]. 液晶与显示, 2010,25(3): 401-406 DOI：

摘要

开发了一种新型的帧存储像素电路结构

实现了像素内低功耗。通过SPICE仿真对新型像素结构的工作时序和功耗进行了验证。本像素结构通过像素内嵌电压比较器对相邻两场数据电压进行比较来实现帧存储像素电路放电操作的智能控制

这种智能放电操作降低了LCoS的功耗。

Abstract

A novel frame buffer pixel circuit was developed which acquires low power inside a pixel. The function timing and power of this novel pixel circuit was evaluated by SPICE simulation. A voltage comparator embedded in a pixel compares the adjacent frame data voltage by which the intelligent discharge operation was realized. This intelligent discharge operation lowers the power dissipation in LCoS backplane.

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references

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