TFT-LCD中电容对公共电压的影响

邱鑫茂; 王巧妮; 刘娜妮; 刘耀; 王宝强; 谢鑫; 涂婷婷

doi:10.37188/CJLCD.2021-0256

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TFT-LCD中电容对公共电压的影响

显示技术与应用 | 更新时间：2022-03-25

- TFT-LCD中电容对公共电压的影响
- Effect of capacitance on common voltage in TFT-LCD
- 液晶与显示 2022年37卷第3期页码：351-357
- 作者机构：
  
  福州京东方光电科技有限公司, 福建福州 350300
- 作者简介：
  
  [ "邱鑫茂(1991-)，男，福建龙岩人，硕士，工程师，2016年于福州大学获得硕士学位，主要从事液晶显示屏研发和生产工作。E-mail: qiuxinmao@boe.com.cn" ]
- 基金信息：
- DOI：10.37188/CJLCD.2021-0256
  中图分类号： TN141.9
- 收稿日期：2021-10-13，
  
  修回日期：2021-12-01，
  
  纸质出版日期：2022-03
- 稿件说明：
移动端阅览
邱鑫茂, 王巧妮, 刘娜妮, 等. TFT-LCD中电容对公共电压的影响[J]. 液晶与显示, 2022,37(3):351-357.

Xin-mao QIU, Qiao-ni WANG, Na-ni LIU, et al. Effect of capacitance on common voltage in TFT-LCD[J]. Chinese journal of liquid crystals and displays, 2022, 37(3): 351-357.
邱鑫茂, 王巧妮, 刘娜妮, 等. TFT-LCD中电容对公共电压的影响[J]. 液晶与显示, 2022,37(3):351-357. DOI： 10.37188/CJLCD.2021-0256.

Xin-mao QIU, Qiao-ni WANG, Na-ni LIU, et al. Effect of capacitance on common voltage in TFT-LCD[J]. Chinese journal of liquid crystals and displays, 2022, 37(3): 351-357. DOI： 10.37188/CJLCD.2021-0256.

摘要

为分析TFT-LCD线残像，研究了画面驱动数据电压通过电容(

)对公共电压的影响。首先根据实际膜层分布，描述电容在膜层的具体构成，并建立电路等效模型，测量并分析TFT-LCD实际工作状态的电容。然后，建立方法测试棋盘格画面公共电压畸变并分析其造成线残像的机理。最后，设置“黑灰条”画面使畸变量最大化以便于分析畸变的形成过程和影响因素。实验结果表明：TFT开关关闭时呈现高阻态，

仅为公共电压和数据电压金属线交叠电容(

)，电容值为55 fF；TFT完全打开时呈现低阻态，

由存储电容和

并联构成，电容值为530 fF；当TFT处于中间态时，测试得到的电容值为中间值。电容值越大，数据电压转换速度越快，畸变量越大。降低转换速度(48 ns→53 ns)，可减小畸变量(2.67 V→2.61 V)。

Abstract

In order to analyze the line image sticking of TFT-LCD

the influence of pattern's data driving voltage on common voltage through capacitance (

) is studied. Firstly

according to the actual film distribution of array

the specific composition of capacitance in the film is described

and the equivalent circuit model of

is established. The

in actual working state is measured

and analyzed by the model effectively. Then

the method is established to measure the distortion of common voltage generated by checkerboard driving voltage and analyze the mechanism of line image sticking. Finally

the "black-gray-bar" pattern is set to maximize distortion

so as to analyze the formation process and influencing factors of distortion. The experimental results show that when TFT is turned off

TFT presents a high resistance state

is the same as

(corresponding to overlapping metal line of data voltage and common voltage)

which is 55 fF. When the TFT is turned on

it presents a low resistance state

is connected in parallel by a storage capacitance and

which is 530 fF. When the TFT is in the intermediate state

the capacitance is the intermediate value obtained from the measure. The larger the capacitance of

the faster the conversion speed of data voltage is

and the larger the distortion is. It is found that reducing the conversion speed from 48 ns to 53 ns can reduce the distortion value from 2.67 V to 2.61 V.

关键词

Keywords

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